When entering the Bloomington, Minnesota–based SkyWater Technology Foundry cleanroom, reporters must don gloves, a hair bonnet, a hood, a safety suit, and booties. The final touches are safety goggles and another fresh pair of gloves. Going into a clean room where semiconductor chips are being manufactured is like going into outer space, says Eric Schneider, director of production at SkyWater. But all the gear is to protect the chips rather than the people. Clothing fibers, dirt, and even moisture droplets from a person’s breath can be damaging. On the floor at SkyWater, ventilation systems clear the air, ensuring it contains only ten such particles per cubic foot (.028 m3).
Semiconductor manufacturing facilities—or fabs—like SkyWater, which makes chips for quantum-computing company D-Wave Systems and consumer electronics companies, have good reason to worry about dust. The tools traditionally used to manufacture silicon circuits are highly specialized and sensitive machines. A stray speck of dust can blur the fine patterns being lithographically etched into chips. A misplaced metal particle can change the electrical properties of whatever circuit element it lands on.
These tiny flaws can add to expensive mistakes, forcing manufacturers to trash an entire wafer full of chips. That’s why it’s surprising that SkyWater is starting a project to manufacture circuits from carbon nanotubes. The material is a “fab poison,” says Greg Schmergel, CEO of Nantero, a carbon nanotube memory company. If not properly preprocessed and contained, nanotubes and tiny particles can cause big problems in a fab. They also carry traces of potential contaminants—the metal catalysts used to grow them.
SkyWater is taking the risk of bringing poison into its pristine facilities because the potential rewards are significant: carbon nanotube computing systems might one day be a savior in computer science, says Subhasish Mitra, a computer scientist at Stanford University. Today’s computers and other electronics spend surprisingly little time performing actual computations. Instead, a whopping 80–90% of their time and electricity is used to fetch data from storage and shuttle them back and forth to central processors.
This bottleneck chokes computing systems of all kinds, whether housed in huge server banks at Google and Amazon or in a laptop or on an airplane. And the problem is only getting worse—it’s compounded for emerging data-intensive applications that rely on artificial intelligence, such as self-driving cars. “Artificial intelligence and machine learning are dominated by memory access,” Mitra explains. One way to ease computer data transfer is to bring memory and processing closer together. However, accomplishing this with silicon is difficult because of the way semiconductor chips are built. Mitra sees carbon nanotubes as a way out.
These semiconducting nanomaterials can replace silicon in transistors and other circuit elements. And because nanotubes can be formulated into inks, researchers can layer them in multilevel circuits—something impractical with silicon. Memory arrays can be slipped into stacks of carbon nanotube circuits, each layer connected closely to the ones above and below by a metal wiring layer. This design breaks the memory bottleneck by offering more short-distance speedways for data to travel, reducing the time and energy used to fetch and send data. Mitra’s models suggest that 3-D stacked nanotube circuits are three times as fast and energy-efficient as equivalent silicon systems. “There is no other way to improve performance and energy use,” he argues.
The Stanford researcher has drawn on this true-believer spirit to get through the past decade. When IBM scientists made the first carbon nanotube transistors in 1998, researchers were excited about the possibilities. However, making practical nanotube electronics in a standard fabrication facility has proved challenging for a few reasons: individual nanotubes’ electrical properties vary, making it difficult to control their performance, and placing them precisely in circuits is difficult. So, the initial enthusiasm died down.
But Mitra, along with Stanford materials scientist H.-S. Philip Wong and Max Shumaker, a former student who is now a professor at the Massachusetts Institute of Technology, kept on making ever-more-sophisticated carbon nanotube computing systems in the lab, including complex sensor systems and even a rudimentary computer.
Now, the team faces a make-or-break test. In July 2018, the group got a vote of confidence and $61 million from the US Defense Advanced Research Projects Agency (DARPA) to prove they could manufacture 3-D stacked carbon nanotube circuits in a commercial semiconductor factory. That’s where SkyWater comes in. Working with the semiconductor manufacturer, the researchers have two years to make good on carbon nanotubes’ promise. Shumaker, the project’s principal investigator, is optimistic. Carbon nanotubes deserve an “honest second look,” he says.
The funding for the Stanford-MIT carbon nanotube project was announced in July at a project kickoff meeting for DARPA’s Electronics Resurgence Initiative in San Francisco. There, personalized music selections accompanied some speakers as they walked on stage. For Intel chief technology officer Mike Mayberry, speakers blasted “The Future’s So Bright, I Gotta Wear Shades.” “The future is so bright,” Mayberry said, starting a talk by arguing that Moore’s law—which describes the ability of the semiconductor industry to keep improving chips by jamming ever more transistors in a given chip area—will continue to hold.
But Timbuk3’s one-hit wonder is an ironic song about a looming nuclear apocalypse. And many engineers don’t share Mayberry’s rosy view. Although manufacturers continue to add more transistors to each new generation of chips, the practice is becoming less profitable. “The manufacturing process itself has become more expensive” as it has become more complex, says Qing Cao, now a materials scientist at the University of Illinois at Urbana-Champaign. Cao worked at IBM until last year. Cao says that the performance gains for each new generation of chips are also marginal—only about 10–15%.
One way to get around the limitations of Moore’s law and cram more computing power onto a chip is to build up. But it’s impossible to layer stack after stack of silicon circuits atop one another because of the high temperatures and conditions used to process the chips—the metal wiring used to connect the layers would melt. Carbon nanotubes, on the other hand, are compatible with lower-temperature processing.
Through the Electronics Resurgence Initiative, DARPA invests $1.5 billion over five years in applied research to help the semiconductor industry find new ways to advance. So far, $216 million in funds has been announced. At $61 million, the carbon nanotube electronics project has received the biggest investment. “Maybe it’s the right answer, maybe not,” said William Chappell, head of DARPA’s Microsystems Technology Office, at the July event. But it will allow the industry to explore the possibilities of 3-D architectures—and carbon nanotube enthusiasts hope it will be a chance to prove they are right.
Some scientists get dreamy when talking about the physics of carbon nanotubes. For enthusiasts, no other electronic material compares—not silicon, organic molecules, graphene, or other 2-D materials. “Carbon nanotubes are the ideal semiconductor,” says Michael Arnold, a materials scientist at the University of Wisconsin–Madison. Carbon nanotube transistors exhibit ballistic conduction: electrons fly through them like speeding bullets, enabling speedier calculations.
This excellent property is not just theoretical—researchers have seen it in transistors and circuits built in the lab. In 2012, Aaron Franklin’s group, then at IBM and now at Duke University, made a 9 nm wide nanotube transistor that, for the first time, outperformed a silicon one of the same size (Nano Lett., DOI: 10.1021/nl203701g). That transistor, however, funneled electrical current through only a single nanotube, which isn’t practical because it won’t send a strong electrical signal in commercial devices.
So, researchers started working out how to build transistors from groups of nanotubes lined up parallel. The more nanotubes in a transistor, the more current it can carry. But if the nanotubes are too close, they can interfere with one another. In 2016, Arnold and colleagues at the University of Wisconsin–Madison demonstrated ballistic conduction in multi-nanotube transistors. Their transistors used groups of about 100 carbon nanotubes at a density of 47 tubes per micrometer, a spacing that’s not too close and far to conduct current optimally.
And then there are the real-device demonstrations, including many done by the Stanford and MIT team now being funded by DARPA. 2013, it built the first carbon nanotube computer (Nature, DOI: 10.1038/nature12502). It was a relatively simple one; at the time, Mitra compared it to the Intel 4004, that company’s first microprocessor, which debuted in 1971. In 2017, the nanotube researchers constructed a chemical-sensing device with 2 million carbon nanotube transistors. On Feb. 20, they presented their most complex device to date at the International Solid-State Circuits Conference in San Francisco. It overcomes flaws in the individual nanotubes in its 3-D circuits. For instance, if a nanotube transistor contains an imperfect tube, nearby memory cells will essentially turn the transistor off. In that sense, the courses are “self-healing,” Shumaker says.
“They’ve taken this farther than most academics would, or should,” says Linton Salmon, a program manager in DARPA’s Microsystems Technology Office. While an academic lab can spend a lot of time making one circuit with great performance, manufacturers must produce many circuits that perform well every time or lose money. “Historically, carbon nanotubes have shown impressive boosts in the lab that have been difficult to scale to a product,” says Anthony Vicari, a materials analyst at Lux Research in Boston. Given that precedent, the Stanford and MIT team has much to prove as it heads into the fab.
Untangling the tubes
Engineers at SkyWater believe they can scale up the technology. Others have successfully built carbon nanotubes into devices, so why not? For instance, the nanotube memory company Nantero has worked with the material in fab facilities since 2004. Having tackled many of the challenges of nanotubes, Schmergel, Nantero’s CEO, is watching the DARPA project with interest. One challenge with carbon nanotubes is that they are grown from catalytic metal seeds—and fab operators will not tolerate any stray metal in their clean rooms. Nantero developed a way to strip that metal from its tubes, and the researchers on the DARPA project will also need to.
Another challenge is figuring out how to build a product. Nantero had created prototypes of its development with specialized equipment. However, the semiconductor industry is reluctant to add expense by changing anything about the equipment already used to build silicon circuits. “We thought people would be open to using new tools,” Schmergel says. That was a pipe dream. So, Nantero adapted its production process to work with existing equipment. Fujitsu Semiconductor licensed Nantero’s memory technology in 2016 and has announced it will use the technology in a product coming out sometime this year. Schmergel says other companies have licensed the technology under confidentiality agreements.
Schmergel expects the DARPA project to face many of the same challenges as Nantero. “They have outstanding results in the research and lab space,” he says. “But moving from the lab to the production stages can be quite a shock.” Building computing elements, not just memory elements, from carbon nanotubes will be even more challenging. While Nantero can use mats of metallic and semiconducting carbon nanotubes to make memory cells, the researchers on the DARPA project need to make transistors from purely semiconducting nanotubes lined up in perfectly straight rows. They must be semiconducting so that the transistors can switch crisply from allowing electrical current to flow to blocking it to generate the ones and zeros that encode data.
When chemists make carbon nanotubes without special techniques—typically in a chemical vapor deposition process seeded with catalytic metal nanoparticles—about two-thirds of the synthesized tubes are semiconducting, one-third metallic. With careful engineering of nanoparticle catalysts, researchers are working on growing fractions of semiconducting tubes. But they’re not yet at the purity—about 99.99%—that researchers say is needed to make working transistors.
So the solution, for now, is to sort the tubes. Although the SkyWater, Stanford, and MIT researchers would not detail their process, one clue is that NanoIntegris is a subcontractor on the DARPA project and will supply the project with purified nanotubes. NanoIntegris, cofounded by Mark C. Hersam, a materials scientist at Northwestern University, uses specially engineered polymers that interact differently with semiconducting and metallic tubes to separate them.
Purification methods for carbon nanotubes have advanced significantly, says Zhenan Bao, a materials scientist at Stanford. However, building with the purified tubes is still tricky, she says. “The challenge is to deposit them directly from solution with alignment and at high density without bundling,” she says. To maximize current through a high-performance transistor, all the nanotubes should be lined up straight like strands in a box of raw spaghetti. This ensures the electrons can zip from one tube end to the other without hiccups. But carbon nanotubes tend to tangle like a pile of cooked noodles, increasing their electrical resistance.
Again, the DARPA group would not reveal its secret recipe for tube alignment, except that it will dip silicon wafers in nanotube solutions to coat them with the material. Hersam says there are a few ways to set tubes straight, and some involve painting nanotube inks onto a wafer. Another approach is to grow nanotubes directly on a surface—that’s how the Stanford and MIT groups made their academic devices.
The next step, carving those aligned nanotubes into transistors, also requires a departure from business as usual. Once carbon nanotubes have been deposited on a chip, they cannot be exposed to the plasma-enhanced etching techniques that are a workhorse of the silicon semiconductor fab. Carbon nanotubes are too sensitive to this highly reactive environment. So SkyWater is developing alternative etching technologies.
So far, SkyWater has set aside a new cleanroom for work on carbon nanotubes, with a separate ventilation system from the rest of the fab. It’s a mostly empty, white-walled space. On a freezing day in early February, engineers were working on installing their first piece of equipment, a wet bench that they’ll use to deposit the nanotubes onto wafers.
The team has until the end of 2020 to prove they can manufacture carbon nanotube circuits. According to the project timeline, SkyWater will offer potential customers a product development kit by then. That means customers can upload parameters for a desired electronic system, and SkyWater will use software to convert it into a carbon nanotube design and manufacture it.
If everything goes to plan, SkyWater president Thomas Sonderman says, carbon nanotube electronics could help revive the semiconductor industry in the US. The country currently has no bleeding-edge semiconductor fabs. However, the US is not the only country working on this technology. China has big ambitions for its semiconductor industry and is funding carbon nanotube research, including a large group at Peking University. Researchers in Europe are also testing the manufacturability of these circuits.
According to Program Director Iuliana Radu, Belgium-based Imec, a semiconductor research firm, has kept carbon nanotubes on its radar. The company focuses on applied research, so she adds that the organization turned away from experimental work on nanotubes about ten years ago. “They were so far from industrial adoption, and it went on the back burner,” she says. However, carbon nanotube devices have started to pull ahead in the company’s benchmarking studies, which compare various novel device technologies. So Imec is now working to bring nanotube electronics into the fab, parallel with the DARPA project. Instead of exploring 3-D integration, Imec will look at nanotubes’ limits: the best possible nanotube transistors the company can make at large volumes, how small they can be, and what cost.
Researchers working on carbon nanotubes are excited to see DARPA funding research into nanotube circuits, but they are measured in their expectations. Duke University’s Franklin is not holding his breath. “I think it’s fascinating that this level of integration is being attempted,” he says. “I hope they succeed, but I don’t know that it will be on the level in their proposal.”
Illinois’s Cao is also cautiously optimistic. “The first step is to make people comfortable that we can process this material in the fab,” he says. Cao says developing a fundamentally new technology will require a large ecosystem of toolmakers, manufacturing companies, device and circuit designers, and software developers.
Shumaker says he’s energized by working on a project others are skeptical about. He recalls his reaction when he was doing interviews for PhD programs around 2010. “When I was doing my PhD interviews, and I told someone I wanted to work on carbon nanotubes, and they laughed,” Shulaker recalls. “They weren’t trying to be mean,” he says, but many had given up on nanotube electronics. Shumaker and Mitra expect more will return to the field, and new people will join after the DARPA project ends.
Franklin, meanwhile, expects that success for carbon nanotube electronics will hinge on the involvement of a bigger company, like Intel, Samsung, or Taiwan Semiconductor Manufacturing Company. He suspects they’re keeping an eye on the endeavor. “All the big companies in the semiconductor world know about this project, and they’re waiting to see how it plays out,” he says.